Power Aware Embedded Systems
Objective of the lecture is to give an introduction into power aware design at different levels of an embedded design, starting with foundations of physics up to the networking and scenario of usage. The student will be enabled to develop sophisticated concepts of power- and energy-aware HW/SW systems, considering different aspects of the implementation stack.
(Figure right: Wake-Up Receiver for harvester-driven sensor networks, developed at institute of Prof. Grimm; TU Vienna at that time)
Topics covered include:
1) Introduction - Use cases, energy- vs. power aware, linear power.
2) Technological Foundations and its Physical Limits -Models of static and dynamic CMOS power consumption, FINFET, Tri-Gate, SubTh, Adiabatic circuits, Landauer's Principle, reversible logic
3.1) Power Supply und Power Converter - Primary cells, Harvesters, Capacitive converter, Buck converter, Boost converter, Buck-Boost converter, estimation of efficiency
3.2) Data path and Architecture - Dedicated HW, Pipelining, Paralelity, Architectural Power Gating, Clock Gating, Voltage Scaling, System partitioning
3.3) CPU, Memory, FPGA - Refresh, Power states, LPDDR, FeRAM, MRAM, RRAM, Ultra-low power Prozessoren, IGLOO FPGA
4.1) Power Management - RFTS, DFS, DVFS, AVS, Closed-Loop DVFS
4.2) Operating System - APM, APCI, Power Governor, Wake locks, TinyOS, Driver
4.3) Communication - Single-hop vs. multi-hop, MAC layer, ALOHA, MANET, MACA, S-MAC, PAMAS, Wake-up Receiver, ZigBee, W6LoPan, Bluethooth
5) Design methodology and tools - Power estimation, power profiling